FPGA/BBC Now boots and runs basic

Well I've got a bit further on with the FPGA project today. I managed to get it to boot to BASIC and run long enough to type in simple test programs.

There were a few problems of my own that I had to overcome...such as spotting some address selection logic that I'd commented out for some unknown reason and some dodginess with my SPI slave implementation (which is how I'm sending keystrokes to the FPGA).

The real stumper though was seems to be an apparent bug in the T65 6502 core I got from open cores. It seems that during a PLP instruction the disable interrupt flag randomly got changed to off (i.e. interrupts enabled) even when the P register had it set before the PLP and the value on the stack had it set.

I made a small change to the core to ignore the IRQ_n_o while LDP (load P from ALU signal) is high,during which time it is unstable.

... t65.vhd line 542 on
-- DOM HACK : PLP causes Flag_I to follow ALU_Q during LDP, ignore until
-- LDP is low, otherwise get spurious irq cycles during PLP even if
-- I is set before and after PLP!
elsif IRQ_n_o = '0' and P(Flag_I) = '0' and LDP = '0' then
    IRQCycle <= '1';
end if;

Seems to work ok but I'm not clear why nobody else has run into this one or is it some timing thing I'm doing?