Saturday 1 March 2014

HDMI output from a DE0 nano

I've recently been trying to learn VHDL after a lot of playing around with pretty basic stuff I've decided to set myself the goal of making a 16-bit 65816 computer in VHDL. This will be loosely based on a BBC Micro with a 65816 processor, lots of RAM and better graphics than the original. A kind of imagining of what might have been if Acorn hadn't made the leap straight to 32 bits from 8!
The other project I've been toying with is a HDMI to 405 line system A converter.




I've downloaded a few 6502 cores from IPCores and had a play and got one working at 50MHz...I'd really like to find / make one that will do a decent cycle accurate 65816 but not found one yet....so looks like I need to make my own.

Anyway I digress, one of the aims of the project will be to try and get it working on a DE0nano with a minimum of interfacing. I'd really like to be able to generate HDMI directly from the chip. This isn't really possible as the chip on the DE0 nano (a Cyclone IV) doesn't have HDMI compatible outputs. However I've seen elsewhere that people have  managed to drive HDMI/DVI with LVDS ports and the Cyclone IV does have enough of these.

I've never done anything with digital video before so I thought I'd have a look round for other people's stuff to hack at. I found this on hamsterworks which seemed as good a starting point as any. This was written for a Xilinx part and uses a few things not available on the Cyclone. Mainly the clock manager and an ODDR2 output buffer.

For my first hackaday attempt I've used one of the Cyclone's PLLs to create a 25MHz pixel clock and a pair of 125MHz TMDS bit clocks (only one of these is used at present). I've also knocked together a quick n dirty ODDR2 substitute. This isn't a proper job as it ignores the second clock, it just latches both values on the rising edge of the first clock and muxes the two latched values based on whether the clock is high or low. The code for the Quartus project can be downloaded here - the code provided as is and no guarantees.

To interface the hdmi cable to the DE0 nano I should probably have worried about sheilding, lead lengths, voltage / current translations and all that stuff but I didn't bother, I just cut a HDMI lead in two and used a pile of clip probes and wires to connect up....surprisingly after a bit of wire-wiggling it worked!

The next job will be to make some better shielded leads, this set up is pretty ropey and if the clock leads aren't just so all sorts of weird patterning starts to appear, also the picture disappears if a text message comes through on my phone!


3 comments:

  1. DE0-Nano VCCIO is fixed at 3.3v, LVDS standard is 2.5v, are you sure that is safe TX with 3.3v?

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  2. Can you provide us verilog source code for hdmi-output?

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