More HDMI, problems and glitches

After a bit more messing I discovered that the cable positioning was quite critical - move it about and it would drop out, flash or go out altogether. So, I decided I'd have a go at making a shorter / neater lash up...this time I cut up some jump cables with 1" pig tails and soldered them onto the wires in the hdmi cable. This looked much neater but didn't work...not a sausage. Whatever I did I couldn't make it work again. I checked and rechecked tested every connection, checked all my assignments in Quartus. Still nowt!

This is what my (slightly neater) lash up looked like after I'd half taken it to pieces again!

So, off for dinner and an hour of being patronised by some vacuous documentary on BBC Four led to a brain wave. I'd noticed earlier that the closest sign of life I'd had was when I made the clock leads longer and put a loop in them (by using a pair of jump leads). There must be a problem with the timing of the clock vs the blue/red/green signals? I decided I'd do a gate-level simulation and there it was looking me in the face. All four TDMS signals had glitches on them. My half-baked attempt at making a double data rate output latch with a pair of latches and a mux was not doing what it should. Also, that would explain why with a crappier higher inductance cable setup it was working...the glitches were being filtered out! So a bit more hunting and I found Altera's cousin of the Xilinx ODDR2 component. It's an ALTDDIO_OUT and only requires a single clock but outputs on rising and falling edges, instead of a pair of anti-phase clocks.

I was now getting a cleaner signal in the simulation but still no joy in getting a picture on screen....another hour of head-scratching and poking with my battery, resistor, led circuit tester finally told me another thing I'd not spotted...the HDMI cable has nice colour coded wire pairs. Unfortunately, the blue and gree pairs are swapped! Once I'd worked this out the picture popped straight back up on screen and now it is totally glitch free.

A bit more messing around in VHDL to make some colour bars and try and get my head round how the original code's registered signals thing was working and here's the result: